Sr/Staff IC Design Engineer (Frontend RTL Design)

• RTL coding and development for IPs and SOCs using Verilog

• Responsible for pre-digital SOC modules

• Explore architecture and develop micro-architecture

• 3rd party IP identification, selection, and integration

• Assist in silicon bring-up and validation

• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues
  

Key Requirements

• Bachelor’s degree in Electronics Engineering or equivalent with min 10+ years of experience in Frontend IC Design.
• Possess deep and broad knowledge of current and emerging SOC design technologies.
• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC
Can architect and guide programs across the full range of technical areas

Ethos Search Associates

EA Licence No: 13C6655
EA Reg No: R1109557 Rose